Low-Power High-Level Synthesis for Nanoscale CMOS Circuits

Low-Power High-Level Synthesis for Nanoscale CMOS Circuits This self-contained book addresses the need for analysis, characterization, estimation, and optimization of the various forms of power dissipation in the presence of process variations of nano-CMOS technologies. The authors show very large-scale integration (VLSI) researchers and engineers how to minimize the different types of power consumption of digital circuits. The material deals primarily with high-level (architectural or behavioral) energy dissipation. Autor: Saraju P. Mohanty, Nagarajan Ranganathan Wydawnictwo: Springer-Verlag New York Inc. Rok wydania: 2008 Okładka: twarda Liczba stron: 302 Wymiary: 15.5 x 23.5 x 2 cm Ilustracje: 25 Tables, black and white; 20 Illustrations, black and white; XXXII, 302 p. 20 illus. Język: angielski ISBN: 9780387764733